docs: ASCII typography and style normalization across all repo text

Replace every em dash with real punctuation (rewrites, not hyphen swaps)
in docs, code comments, scripts, configs, and the port records; convert
en dashes, curly quotes, ellipsis glyphs, arrows, and section signs to
ASCII; drop machine-writing tell phrases from living docs. ADR titles
now use a colon. The M2 bring-up DTS model string carried an em dash
into the patch series and its record echoes; fixed at both, and the full
series re-verified to apply cleanly onto pristine 6.18.46. One comment
in freshness.h deliberately names the em dash glyph the UI renders as
the unknown mark; that is data, kept as prose naming it.

Verified: cargo tests (sim, config-lint, rs485-bridge), shellcheck,
both driver MC/DC harnesses, patches-apply.

kernel/rv1106-enablement/mailbox/scr1-echo/Makefile

@@ -1,4 +1,4 @@
-# HPMCU mailbox-echo firmware — bare-metal RV32IMC for the RV1106 SCR1 core.
+# HPMCU mailbox-echo firmware: bare-metal RV32IMC for the RV1106 SCR1 core.
 # Same xPack riscv-none-embed-gcc 10.2.0 + flags as the watchdog firmware.
 
 # Point XPACK at the xpack riscv toolchain bin/ inside a flare-edge SDK checkout.

kernel/rv1106-enablement/mailbox/scr1-echo/link.lds

@@ -1,5 +1,5 @@
 /*
- * HPMCU watchdog supervisor — linked into the hpmcu_sram carve-out.
+ * HPMCU watchdog supervisor: linked into the hpmcu_sram carve-out.
  *
  * The RV1106's 256K on-chip SRAM at 0xFF6C0000 is split by the kernel DT
  * (rv1106.dtsi sram@ff6c0000) into rkisp_sram (0x0..0x3e000) and hpmcu_sram

kernel/rv1106-enablement/mailbox/scr1-echo/load-echo-fw.sh

@@ -14,7 +14,7 @@
 FW=${1:-/userdata/echo-fw-words.txt}
 
 # GRF uncached peripheral window (covers CRU + this SRAM + the mailbox
-# 0xff5c0000) — WITHOUT this the MCU's peripheral/SRAM accesses are cached and
+# 0xff5c0000): WITHOUT this the MCU's peripheral/SRAM accesses are cached and
 # invisible to Linux. hpmcu.rs: GRF_BASE 0xff040000 +0x24/+0x28 = 0xff000/0xffc00.
 devmem 0xff040024 32 0xff000
 devmem 0xff040028 32 0xffc00

kernel/rv1106-enablement/mailbox/scr1-echo/main.c

@@ -20,7 +20,7 @@
  * watchdog SRAM mailbox relies on).
  *
  * Loaded + started by the proven flared/hpmcu.rs SRAM sequence
- * (0xFF6FE000 load addr, CORECRU reset hold/release) — NOT the 0x40000
+ * (0xFF6FE000 load addr, CORECRU reset hold/release), NOT the 0x40000
  * boot-load path (that bricks a non-TB board; see boot-loaded-mcu-0x40000
  * hazard). Fits the 8K hpmcu_sram budget (this is a few hundred bytes).
  */
@@ -29,7 +29,7 @@
 
 #define REG32(a)	(*(volatile uint32_t *)(uintptr_t)(a))
 
-/* Mailbox IP (HPMCU-connected instance) — offsets match rockchip-mailbox.c. */
+/* Mailbox IP (HPMCU-connected instance): offsets match rockchip-mailbox.c. */
 #define MBOX_BASE	0xFF5C0000u
 #define A2B_INTEN	REG32(MBOX_BASE + 0x00)
 #define A2B_STATUS	REG32(MBOX_BASE + 0x04)

kernel/rv1106-enablement/mailbox/scr1-echo/mbox-roundtrip.sh

@@ -1,6 +1,6 @@
 #!/bin/sh
 # Prove the A7<->HPMCU mailbox round-trip on channel 0. Write A2B_CMD first, then
-# A2B_DAT — the A2B_DAT write is the doorbell (raises A2B_STATUS on the MCU side,
+# A2B_DAT: the A2B_DAT write is the doorbell (raises A2B_STATUS on the MCU side,
 # whose echo firmware has enabled A2B_INTEN), so both CMD and DAT are current when
 # the SCR1 reads them. The SCR1 echoes {cmd,dat} verbatim into B2A_CMD/B2A_DAT.
 CMD=${1:-0x00001234}