kernel: clk-rv1106.c COMPILES CLEAN on 6.18 (M1 first driver ported)

Full clk port done: Kconfig/Makefile wired, 55 CRU macros, panic_notifier header
split, armclk signature adaptation, CLK_FRAC_DIVIDER_NO_LIMIT->0. clk-rv1106.o
(85KB) builds no-errors with gcc-8.3. Two PORT-VERIFY flags (CPU mux, UART frac
baud) for TRM/hardware validation. First RV1106 driver ported vendor-5.10->6.18.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf

kernel/rv1106-enablement/clk/clk-rv1106.c

@@ -16,6 +16,13 @@
 #include <dt-bindings/clock/rv1106-cru.h>
 #include "clk.h"
 
+/* PORT(6.18): Rockchip downstream-only frac-divider flag; mainline has no
+ * min/max-limit opt-out, so map to 0 (default limit). PORT-VERIFY: UART frac
+ * baud accuracy on the 6 clk_uart*_frac clocks. */
+#ifndef CLK_FRAC_DIVIDER_NO_LIMIT
+#define CLK_FRAC_DIVIDER_NO_LIMIT 0
+#endif
+
 #define CRU_PVTPLL0_CON0_L		0x11000
 #define CRU_PVTPLL0_CON0_H		0x11004
 #define CRU_PVTPLL0_CON1_L		0x11008