kernel/rv1106: M5 AIC8800 wifi/BT port — build-verified, capture recipe

Driver built into self-built 6.18 (=y): zImage 12.7MB + rv1106-warden.dtb
build clean; System.map confirms aicbsp_sdio_driver, aicwf_sdio_driver,
rwnx_cfg80211_ops linked with correct bsp->fdrv->btlpm initcall order (host
nm/System.map — cross-nm/ar mis-list these, verify with System.map).

Recipe captured (driver .c is vendor GPL source in the SDK, not duplicated):
- kbuild/ — from-scratch in-tree Kconfig + Makefiles (bsp->fdrv->btlpm link
  order; tristate->default y; AIC_FW_PATH as a real Kconfig string symbol).
- wifi-dt-block.dtsi — sdio_pwrseq (mmc-pwrseq-simple, reset gpio1 PA2) +
  &sdmmc (mmc@ffaa0000, supports-sdio, cap-sdio-irq, non-removable).
- PORT-PROGRESS.md — full file->change log: ~30 timer/netdev renames, 7
  cfg80211_ops signature deltas, link_id args, wakeup_source API rewrite,
  49 bsp/fdrv symbol collisions renamed aicbsp_priv_*, rwnx_mesh restore.

Firmware present on both oem_a+oem_b (/oem/usr/ko/aic8800dc_fw); on-hardware
wlan0 verify next.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf

kernel/rv1106-enablement/dts/rv1106-warden.dts

@@ -23,6 +23,13 @@
 		device_type = "memory";
 		reg = <0x00000000 0x10000000>; /* 256 MiB */
 	};
+
+	/* --- M5: AIC8800DC wifi/BT power sequencing --- */
+	sdio_pwrseq: sdio-pwrseq {
+		compatible = "mmc-pwrseq-simple";
+		pinctrl-names = "default";
+		reset-gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>;
+	};
 };
 
 /* --- console --- */
@@ -39,6 +46,22 @@
 	status = "okay";
 };
 
+/* --- M5: AIC8800DC wifi/BT SDIO (on &sdmmc, mmc@ffaa0000 — NOT &sdio) --- */
+&sdmmc {
+	max-frequency = <50000000>;
+	bus-width = <4>;
+	cap-sd-highspeed;
+	cap-sdio-irq;
+	keep-power-in-suspend;
+	non-removable;
+	rockchip,default-sample-phase = <90>;
+	supports-sdio;
+	mmc-pwrseq = <&sdio_pwrseq>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>;
+	status = "okay";
+};
+
 /* --- batch 1: mainline peripherals (wire DT + config) --- */
 &uart1 {
 	status = "okay";