diff --git a/kernel/docs/m2-boot-on-c8a3.md b/kernel/docs/m2-boot-on-c8a3.md index 8db254f..4f09b51 100644 --- a/kernel/docs/m2-boot-on-c8a3.md +++ b/kernel/docs/m2-boot-on-c8a3.md @@ -84,8 +84,19 @@ pre-MMU), then fixed: CP2102 bench adapter — so the M2 DT pins 115200 for readable bring-up; production overrides to 1.5M. -## Next (M3) +## M3 (same session): ✅ the full WardenOS runs on the 6.18 kernel -The kernel mounts the 5.10 rootfs_b but the userspace/modules are 5.10 (vermagic -mismatch). M3: lean RV1106 defconfig, `dw_mmc`/`sdhci` DT (eMMC already probes — -`MMC0: HS200`), and our Buildroot userspace rebuilt on 6.18. +Adding the eMMC `dw_mmc` node (`mmc@ffa90000`, clocks from cru + grf_cru) was the +only change M3 needed — the mmc/ext4 drivers are already in-config. The kernel +enumerated the eMMC at HS200, mounted the ext4 rootfs, ran `/sbin/init`, and +started every WardenOS daemon. A serial root login confirms `uname -a` → +`Linux warden-c8a3 6.18.46 armv7l`, with `warden-flared/-modbus/-mikrotik/-asic/ +-ui/-flight` all running. Expected M4/M5 gaps show cleanly: the 5.10 aic8800 `.ko` +won't load (vermagic → M5), and there's no backlight/framebuffer yet (→ M4). + +**Console lesson applied:** with `console=ttyS2,115200` the whole boot is readable +on the CP2102 (the 1.5M vendor rate is garbage on it). Serial login uses the same +`c8a3_run.py` [bench-creds] helper as the 5.10 firmware — the userspace is unchanged. + +Next: M4 (VOP2 display + panel + touch), M5 (AIC8800 SDIO port + our 4 patches), +M6 (RGA/watchdog/HPMCU/USB-OTG); plus a lean defconfig + Buildroot-on-6.18 cleanup. diff --git a/kernel/rv1106-enablement/PORT-STATUS.md b/kernel/rv1106-enablement/PORT-STATUS.md index d9755d2..4389e35 100644 --- a/kernel/rv1106-enablement/PORT-STATUS.md +++ b/kernel/rv1106-enablement/PORT-STATUS.md @@ -95,11 +95,35 @@ Three bring-up bugs were found and fixed on hardware, all captured in the DT: comes up far enough to clock the UART and the arch timer on hardware. A wrong CPU mux/PLL would show later (cpufreq / peripheral rates), still to be checked. -## M3 — rootfs boot: NEXT -The M2 kernel mounts the 5.10 WardenOS rootfs_b but the userspace/module vermagic -mismatches (5.10 `.ko` won't load on 6.18). M3 = a lean RV1106 defconfig (drop -multi_v7), `dw_mmc`/`sdhci` DT wired to our CRU (eMMC already probes — `MMC0: HS200`), -and our Buildroot userspace rebuilt against 6.18. Then M4 display, M5 wifi, M6 rest. +## M3 — rootfs boot: ✅ DONE — the full WardenOS runs on the 6.18 kernel (2026-08-24) +Adding the eMMC (`dw_mmc`) node to the DT was all M3 needed — the drivers are already +in the config. On hardware: +``` +dwmmc_rockchip ffa90000.mmc: Version ID is 270a ← our dw_mmc bound +mmc0: new HS200 MMC card ... mmcblk0: 8GTF4R 7.28 GiB ← eMMC at HS200 (198 MHz) +mmcblk0: p1(env)...p10(rootfs_b)...p12(userdata) ← partitions enumerated +EXT4-fs (mmcblk0p10): mounted ... VFS: Mounted root ← ext4 rootfs mounted +Run /sbin/init as init process +Starting warden-modbus / -mikrotik / -asic / -flared / Warden UI +``` +A root shell over the serial console confirms it: `uname -a` → **`Linux warden-c8a3 +6.18.46 armv7l`**, with `warden-flared`, `warden-modbus`, `warden-mikrotik`, +`warden-asic`, `warden-ui`, `warden-flight` all in `ps`. The eMMC node's ciu-drive/ +ciu-sample clocks come from `grf_cru`, so the M2 grf-cru fix was a prerequisite. + +The expected M4/M5 gaps show as clean failures: the out-of-tree 5.10 `aic8800` +wifi/BT `.ko` won't load on 6.18 (vermagic — needs the driver ported, **M5**), and +`warden-ui: no backlight device` (no display/VOP node yet — **M4**). + +## M4/M5/M6 — NEXT +- **M4 display**: VOP2 + the RGB666 720×720 panel + GT911 touch + PWM backlight → + the LVGL UI renders (the UI process already runs, it just has no framebuffer). +- **M5 wifi**: port the AIC8800 SDIO driver to 6.18 (+ the Tier-1 fix) so wlan0/usb0 + come back; re-apply our 4 kernel patches. +- **M6**: RGA, watchdog, HPMCU coprocessor, USB-OTG dual role. +- **Cleanup**: a lean RV1106 defconfig to replace multi_v7 (shrinks the image, retires + the fdt-high workaround) + our Buildroot userspace rebuilt on 6.18 (retires the + vermagic-mismatched modules). ## Upstream tracking (decision 2026-08-23) Base stays the vendor forward-port (applies to 6.18; we control it). The unmerged upstream diff --git a/kernel/rv1106-enablement/dts/rv1106-warden-m2.dts b/kernel/rv1106-enablement/dts/rv1106-warden-m2.dts index acc143e..4186525 100644 --- a/kernel/rv1106-enablement/dts/rv1106-warden-m2.dts +++ b/kernel/rv1106-enablement/dts/rv1106-warden-m2.dts @@ -39,9 +39,8 @@ stdout-path = "serial2:115200n8"; /* * earlycon with no baud = reuse the divisor the bootloader left in - * uart2, so the first prints work regardless of our clock tree. The ttyS console is - * pinned to 115200 to stay readable on the CP2102 bench adapter; - * production WardenOS uses 1.5M. + * uart2, so the first prints work regardless of our clock tree. The + * ttyS console rate (1.5M) is PORT-VERIFY against the board. */ bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyS2,115200n8 earlyprintk rootwait"; }; @@ -123,4 +122,24 @@ clock-names = "baudclk", "apb_pclk"; status = "okay"; }; + + /* M3: the eMMC (dw_mmc). Lets the kernel enumerate mmcblk0 and mount an + * ext4 rootfs. ciu-drive/ciu-sample clocks come from grf_cru, so the + * grf-clock-controller node above is a hard dependency. */ + emmc: mmc@ffa90000 { + compatible = "rockchip,rv1106-dw-mshc", "rockchip,rk3288-dw-mshc"; + reg = <0xffa90000 0x4000>; + interrupts = ; + clocks = <&cru HCLK_EMMC>, <&cru CCLK_SRC_EMMC>, + <&grf_cru SCLK_EMMC_DRV>, <&grf_cru SCLK_EMMC_SAMPLE>; + clock-names = "biu", "ciu", "ciu-drive", "ciu-sample"; + fifo-depth = <0x100>; + max-frequency = <200000000>; + rockchip,use-v2-tuning; + bus-width = <8>; + non-removable; + cap-mmc-highspeed; + mmc-hs200-1_8v; + status = "okay"; + }; };