warden-sdk: bootstrap repo + HPMCU (RISC-V) watchdog simulator

New from-scratch SDK for WardenOS (RV1106). First substance: the hardware
simulator's core — a MemBus register/SRAM seam (one trait, real /dev/mem backend
on device + in-memory SimBus on host) and a faithful port of the HPMCU watchdog
firmware (hpmcu/watchdog/main.c) as HpmcuSim, with 8 tests validating boot-grace
fire, heartbeat-timeout, disarm stand-down, and the flared arm-within-grace safety
property (no boot-loop) — all off-device, in a virtual clock, in <1ms.

This closes the gap the Explore map flagged: flared's devmem.rs/hpmcu.rs are the
only register-touching modules with zero tests. README lays out the SDK vision
(modern kernel, tiered driver MC/DC, proper RGA/HPMCU/NPU simulator, own repo).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf

sim/src/lib.rs

@@ -0,0 +1,16 @@
+//! warden-sim — host-side hardware simulator for WardenOS.
+//!
+//! Lets driver and supervisor logic run and be tested on the host, with no panel,
+//! by modelling the RV1106 hardware the vendor SDK cannot: the register/SRAM bus
+//! ([`membus`]), the RISC-V HPMCU watchdog coprocessor ([`hpmcu`]), and — as they
+//! land — the RGA blitter and the NPU.
+//!
+//! Design: one [`membus::MemBus`] seam, two backends. On the host, [`membus::SimBus`]
+//! is an in-memory word map; on the device, flared's `devmem.rs` implements the same
+//! trait over `/dev/mem`, so the same code runs against either. See the repo README.
+
+pub mod hpmcu;
+pub mod membus;
+
+pub use hpmcu::HpmcuSim;
+pub use membus::{MemBus, SimBus};