From c7ba8781a494ee70ff84321268a8183428275fa5 Mon Sep 17 00:00:00 2001 From: BFE Engineering Date: Tue, 25 Aug 2026 00:54:01 -0600 Subject: [PATCH] kernel/rv1106: GMAC ethernet VERIFIED (100M link) + OTP verified MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit GMAC ✅ eth0 Link Up 100Mbps/Full on c8a3: ported rv1106_ops into mainline dwmac-rk.c (VOGRF RMII mode/speed + integrated FEPHY powerup via CON0; mainline set_speed/powerup split; bandgap trim omitted — analog opt the PHY runs without). &gmac enabled; uses the internal ethernet-phy@2. gmac/PORT-DONE.md. OTP ✅ now reads real data (px30_otp_read): 5211 02fe 084d 5231 ('MR1' chip id), no timeout. rng-otp/PORT-DONE.md updated. Batch A + GMAC complete — TRNG, OTP, GMAC all verified on hardware. DRIVER-PARITY updated. Co-Authored-By: Claude Opus 4.8 Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf --- kernel/rv1106-enablement/DRIVER-PARITY.md | 3 + .../rv1106-enablement/dts/rv1106-warden.dts | 5 ++ kernel/rv1106-enablement/gmac/PORT-DONE.md | 56 +++++++++++++++++++ kernel/rv1106-enablement/rng-otp/PORT-DONE.md | 7 ++- 4 files changed, 68 insertions(+), 3 deletions(-) create mode 100644 kernel/rv1106-enablement/gmac/PORT-DONE.md diff --git a/kernel/rv1106-enablement/DRIVER-PARITY.md b/kernel/rv1106-enablement/DRIVER-PARITY.md index d56294d..f549023 100644 --- a/kernel/rv1106-enablement/DRIVER-PARITY.md +++ b/kernel/rv1106-enablement/DRIVER-PARITY.md @@ -20,6 +20,9 @@ c8a3, not just compiled. | watchdog (dw-wdt, ff5a0000) | ff5a0000.watchdog | mainline | ✅ batch1 (watchdog0) | | tsadc thermal (ff3c8000) | rockchip_thermal | ported (data+init+macros) | ✅ soc-thermal reads 39.8°C | | SARADC (ff3c0000) | ff3c0000.saradc | ported (2-ch v2 data) | 🔨 driver added; probe -22 (clk-rate) | +| TRNG (rng@ff448000) | rockchip,trngv1 | mainline (rk3588 IP) | ✅ /dev/hwrng, real entropy (`rng-otp/`) | +| OTP/nvmem (ff3d0000) | rockchip,rv1106-otp | ported (px30_otp_read) | ✅ rockchip-otp0, reads chip id | +| GMAC (ffa80000) | rockchip,rv1106-gmac | ported (dwmac-rk rv1106_ops) | ✅ eth0 Link Up 100M/Full (`gmac/`) | | GPIO_SYSFS (legacy /sys/class/gpio) | — | mainline (config) | ⬜ goodix script needs it | | PWM (rockchip) | — | mainline (=m) | ⬜ batch2 =y (backlight) | | RTC (rv1106-rtc) | — | ported (vendor driver) | ✅ /dev/rtc0 registers + reads | diff --git a/kernel/rv1106-enablement/dts/rv1106-warden.dts b/kernel/rv1106-enablement/dts/rv1106-warden.dts index 00f9a2a..30d38c0 100644 --- a/kernel/rv1106-enablement/dts/rv1106-warden.dts +++ b/kernel/rv1106-enablement/dts/rv1106-warden.dts @@ -198,3 +198,8 @@ &otp { status = "okay"; }; + +/* --- GMAC: wired 10/100 ethernet via the on-die RMII FEPHY --- */ +&gmac { + status = "okay"; +}; diff --git a/kernel/rv1106-enablement/gmac/PORT-DONE.md b/kernel/rv1106-enablement/gmac/PORT-DONE.md new file mode 100644 index 0000000..ca1f03c --- /dev/null +++ b/kernel/rv1106-enablement/gmac/PORT-DONE.md @@ -0,0 +1,56 @@ +# GMAC (wired 10/100 ethernet) — ✅ VERIFIED on warden-c8a3 (2026-08-25) + +**Result: `eth0: Link is Up - 100Mbps/Full - flow control rx/tx`** on our +self-built 6.18.46. The 86-Panel's RMII MAC + on-die 10/100 FEPHY works; a real +link negotiated on the bench. + +## What was ported +Mainline `drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c` already supports many +rockchip SoCs (incl. rv1108/rv1126) but not rv1106. Added an `rv1106_ops` +(ported from the vendor 5.10 dwmac-rk.c) + the compatible: + +```c +#define RV1106_VOGRF_GMAC_CLK_CON 0x60004 /* in grf syscon@ff000000 (size 0x68000) */ +#define RV1106_VOGRF_MACPHY_RMII_MODE GRF_BIT(0) +#define RV1106_VOGRF_GMAC_CLK_RMII_DIV2 GRF_BIT(2) /* 100M */ +#define RV1106_VOGRF_GMAC_CLK_RMII_DIV20 GRF_CLR_BIT(2) /* 10M */ +#define RV1106_VOGRF_MACPHY_CON0 0x60028 + +rv1106_set_to_rmii() -> writes VOGRF_GMAC_CLK_CON = RMII_MODE | DIV2 +rv1106_set_speed(if,spd) -> VOGRF_GMAC_CLK_CON = DIV20 (10M) / DIV2 (100M) [mainline sig: returns int] +rv1106_integrated_phy_powerup/down -> rk_gmac_integrated_fephy_power{up,down}(priv, CON0) + +static const struct rk_gmac_ops rv1106_ops = { + .set_to_rmii = rv1106_set_to_rmii, + .set_speed = rv1106_set_speed, + .integrated_phy_powerup = rv1106_integrated_phy_powerup, + .integrated_phy_powerdown = rv1106_integrated_phy_powerdown, +}; +/* OF: { "rockchip,rv1106-gmac", &rv1106_ops } */ +``` + +## Adaptations vs the vendor 5.10 ops +- Mainline `rk_gmac_ops` uses `.set_speed(bsp_priv, interface, speed)` returning + int (vendor: `.set_rmii_speed(bsp_priv, speed)` void) — adapted. +- Split `.integrated_phy_power(up)` into mainline's `.integrated_phy_powerup` / + `.integrated_phy_powerdown`, each calling mainline's single-reg + `rk_gmac_integrated_fephy_power{up,down}(priv, CON0)`. +- **Bandgap trim OMITTED**: the vendor also wrote an OTP-derived bandgap value to + MACPHY_CON1; that's an analog optimisation the FEPHY runs without, and mainline's + fephy helper doesn't carry it. Link came up 100M/Full without it. (If signal + integrity ever needs it, the `bgs` OTP cell now reads — see rng-otp/.) + +## DT / config +- `&gmac { status = "okay"; }` — the dtsi `ethernet@ffa80000` node already has + clocks/resets/`phy-mode="rmii"`/`phy-handle=&rmii_phy` + the integrated + `ethernet-phy@2` (`phy-is-integrated`). `rockchip,grf=<&grf>` (the big syscon + covers the 0x60xxx VOGRF offsets). The `bgs`/`txlevel` nvmem-cells are present + but mainline reads neither, so GMAC does not depend on OTP. +- Kconfig: `STMMAC_ETH`, `STMMAC_PLATFORM`, `DWMAC_ROCKCHIP`, `ROCKCHIP_PHY` (=y). + +## Evidence +`rk_gmac-dwmac ffa80000.ethernet eth0: configuring for phy/rmii link mode` → +`eth0: Link is Up - 100Mbps/Full - flow control rx/tx`. PHY bound at +`stmmac-0:02` (integrated). The internal FEPHY reports id 0044.1400; it bound to +the Generic PHY (mainline `net/phy/rockchip.c` INTERNAL_EPHY_ID is 0x1234d400) — +`phy-is-integrated` + c22 was sufficient for a full-duplex 100M link. diff --git a/kernel/rv1106-enablement/rng-otp/PORT-DONE.md b/kernel/rv1106-enablement/rng-otp/PORT-DONE.md index 43409fa..46cfc86 100644 --- a/kernel/rv1106-enablement/rng-otp/PORT-DONE.md +++ b/kernel/rv1106-enablement/rng-otp/PORT-DONE.md @@ -21,7 +21,9 @@ rv1106's clock/reset names need no special handling.) Kconfig `dd if=/dev/hwrng bs=16` → `c697 503d f9db 6b84 50e4 e1ee f232 b2ae` (real HW entropy, non-zero). Hardware entropy source for the panel's crypto/keys. -## OTP / nvmem — 🔨 device registers; read fn corrected, re-verify pending +## OTP / nvmem — ✅ VERIFIED on warden-c8a3 (2026-08-25) +Reads real data: `dd .../rockchip-otp0/nvmem bs=1 count=16 | xxd` → +`5211 02fe 084d 5231 0000 0000 3b15 0000` (contains "MR1" chip id) — no timeout. Mainline `drivers/nvmem/rockchip-otp.c` gains an `rv1106_data` + compatible. **Delta:** @@ -43,5 +45,4 @@ Kconfig `NVMEM_ROCKCHIP_OTP=y`. **DT:** `&otp { status = "okay"; };` (the dtsi **First try** used `.reg_read = rk3588_otp_read` → `timeout during read setup` (rk3588 uses a different addressing path). Corrected to `px30_otp_read` — the mainline user-mode OTPC_USER read, the same sequence the vendor 5.10 driver used -for rv1106 (its `rk3568_otp_read`). Re-verify cell reads on the next _b boot; -`rockchip-otp0` nvmem device already registers. +for rv1106 (its `rk3568_otp_read`). Confirmed: cell reads return real data.