Commit Graph
9 Commits
Author SHA1 Message Date
BFE EngineeringandClaude Opus 4.8 5aedb5e966 kernel/rv1106: SARADC VERIFIED — fixed -22 (vref-supply, not clk)
The saradc -22 was regulator_get_voltage on a dummy vref (no vref-supply in
DT), not the clk divider. Added vcc_1v8 fixed 1.8V regulator + vref-supply
(matching the vendor 86-panel). iio:device0 now reads both channels
(in_voltage0_raw=1023, in_voltage1_raw=246) — the adc-keys path works.

Five drivers verified this run: wifi, TRNG, OTP, GMAC, SARADC.
adc/SARADC-FIX.md; DRIVER-PARITY updated.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-25 01:01:24 -06:00
BFE EngineeringandClaude Opus 4.8 c7ba8781a4 kernel/rv1106: GMAC ethernet VERIFIED (100M link) + OTP verified
GMAC  eth0 Link Up 100Mbps/Full on c8a3: ported rv1106_ops into mainline
dwmac-rk.c (VOGRF RMII mode/speed + integrated FEPHY powerup via CON0;
mainline set_speed/powerup split; bandgap trim omitted — analog opt the PHY
runs without). &gmac enabled; uses the internal ethernet-phy@2. gmac/PORT-DONE.md.

OTP  now reads real data (px30_otp_read): 5211 02fe 084d 5231 ('MR1' chip id),
no timeout. rng-otp/PORT-DONE.md updated.

Batch A + GMAC complete — TRNG, OTP, GMAC all verified on hardware.
DRIVER-PARITY updated.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-25 00:54:01 -06:00
BFE EngineeringandClaude Opus 4.8 270211029d kernel/rv1106: batch A — TRNG verified + OTP (read fn corrected)
TRNG  VERIFIED on c8a3: rv1106 trngv1 == rk3588 TRNG_V1 IP; one OF-table
entry reusing rk3588_soc_data. /dev/hwrng active, rng_current=rockchip-rng,
real HW entropy (c697503d... non-zero). Hardware entropy for the panel.

OTP 🔨: rockchip-otp0 nvmem device registers; added rv1106_data (6-clock
sbpi layout). First reg_read=rk3588_otp_read timed out ('timeout during read
setup'); corrected to px30_otp_read (user-mode OTPC_USER interface = the
vendor's rk3568_otp_read sequence). Cell reads re-verify next _b boot.

See rng-otp/PORT-DONE.md. dts snapshot refreshed (rng+otp enabled).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-25 00:44:35 -06:00
BFE EngineeringandClaude Opus 4.8 6897c9f93e kernel/rv1106: M5 AIC8800 wifi/BT port — build-verified, capture recipe
Driver built into self-built 6.18 (=y): zImage 12.7MB + rv1106-warden.dtb
build clean; System.map confirms aicbsp_sdio_driver, aicwf_sdio_driver,
rwnx_cfg80211_ops linked with correct bsp->fdrv->btlpm initcall order (host
nm/System.map — cross-nm/ar mis-list these, verify with System.map).

Recipe captured (driver .c is vendor GPL source in the SDK, not duplicated):
- kbuild/ — from-scratch in-tree Kconfig + Makefiles (bsp->fdrv->btlpm link
  order; tristate->default y; AIC_FW_PATH as a real Kconfig string symbol).
- wifi-dt-block.dtsi — sdio_pwrseq (mmc-pwrseq-simple, reset gpio1 PA2) +
  &sdmmc (mmc@ffaa0000, supports-sdio, cap-sdio-irq, non-removable).
- PORT-PROGRESS.md — full file->change log: ~30 timer/netdev renames, 7
  cfg80211_ops signature deltas, link_id args, wakeup_source API rewrite,
  49 bsp/fdrv symbol collisions renamed aicbsp_priv_*, rwnx_mesh restore.

Firmware present on both oem_a+oem_b (/oem/usr/ko/aic8800dc_fw); on-hardware
wlan0 verify next.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-24 23:34:39 -06:00
BFE EngineeringandClaude Opus 4.8 fda84b4c27 kernel: RGA 2D accelerator ported (open-source vendor driver) — verified
Ported the vendor multicore RGA char-dev driver (drivers/video/rockchip/rga3/,
CONFIG_ROCKCHIP_MULTI_RGA) to 6.18 — WardenOS's librga uses /dev/rga, not V4L2.
On warden-c8a3: rga2 probe successful, hw_version 3.3.87975, /dev/rga +
/dev/dma_heap present. This is the CPU-savings 2D accelerator (LVGL UI offload).

6 mechanical 5.10->6.18 API fixes (platform remove->void, hrtimer_init->
hrtimer_setup, iommu_map* gfp arg, get_user_pages_remote vmas arg, MAX_ORDER
compat, MODULE_IMPORT_NS string). CMA via the default 64 MiB pool +
DMABUF_HEAPS_CMA (a custom linux,cma DT node hangs boot). Recipe + deltas in
rga/PORT-DONE.md. All open source (vendor C source).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-24 23:00:38 -06:00
BFE EngineeringandClaude Opus 4.8 749f73568a kernel: RTC + tsadc ported (open-source, from vendor source); npu/rga plans
RTC: ported the vendor rockchip,rv1106-rtc driver (rtc-rockchip.c) to 6.18 — one
API delta (rtc_register_device -> devm_rtc_register_device). Verified on
warden-c8a3: /dev/rtc0 registers and reads.

tsadc thermal: ported the rv1106 data + rk_tsadcv9_initialize + the TSADCV9/VOGRF
macros + code table from the vendor; adapted .chn_id[SENSOR_CPU] -> .chn_offset
for 6.18. Verified: thermal_zone0 "soc-thermal" reads 39.8 C.

i2s-tdm: rv1126 fallback compatible added (DAI builds; sound card needs the acodec
port next). saradc still -22 (clk-rv1106 SARADC divider — deferred).

Includes the NPU + RGA open-source port plans (research): rknpu kernel driver is a
small port (RV1106 config already in the vendor driver; 4 dead-code headers need
compat stubs) but no open userspace exists for this NPU gen; RGA = port the vendor
char-dev rga3 driver (WardenOS's librga uses /dev/rga, not V4L2), + a cma pool +
hrtimer_setup. All ports are open source (vendor C source / mainline siblings).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-24 22:48:39 -06:00
BFE EngineeringandClaude Opus 4.8 daed33056f kernel: sweep — usb2phy port (USB host up) + saradc data port
usb2phy: ported the RV1106 inno-usb2 phy config to 6.18 (rv1106_usb2phy_cfg;
fields map 1:1 except utmi_iddig->utmi_id and chg_mode->opmode; 5.10-only
iddig_output/en/bvalid_grf_sel dropped; phy_tuning left off, guarded so safe).
With PHY_ROCKCHIP_INNO_USB2=y + the u2phy/usbdrd/dwc3 DT enabled, verified on
warden-c8a3: the DWC3 comes up as xhci-hcd @ 0xffb00000 — USB host works. eth0
gadget just needs dr_mode=peripheral.

saradc: added rv1106_saradc_data (2-ch v2, matches the vendor) + the native
compatible. Driver now matches; probe still returns -22 (a clk-rate/setup detail,
not the data) — TODO.

Also captured: the growing board dts (USB nodes), the port fragments under usb/
and adc/. DRIVER-PARITY.md updated: ~14 drivers now at parity on 6.18.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-24 22:23:37 -06:00
BFE EngineeringandClaude Opus 4.8 5abf1c4468 kernel: M4 VOP display driver ported to 6.18 — binds on hardware (connector WIP)
The RV1106 VOP is the RV-series "lite" VOP (rockchip,rv1106-vop, VOP_VERSION 2.0xc),
mainline's VOP1 driver. Its sibling rv1126 is already in 6.18, so rv1106_vop reuses
rv1126's register sub-structs + VOP_FEATURE_INTERNAL_RGB + the smaller raster.

Verified on warden-c8a3: with the driver delta + DT (vop enabled with named
"ahb"/"dclk" resets, vop_out repointed to a panel-dpi 720x720 node, pwm-backlight
on pwm1), the VOP BINDS and DRM initialises (/dev/dri/card0), and the PWM backlight
comes up. The register data / version / feature / resets are validated.

Open: /sys/class/drm/card0 has no connector yet — rockchip_rgb_init isn't producing
one ("Cannot find any crtc"). Last mile of M4; needs a debug print in rgb_init + the
panel bus_format, and the pixels must be verified on the physical panel (can't be
checked over serial/ssh). Full recipe + next steps in display/README.md.

Also batch-2 config: GPIO_SYSFS, PWM_ROCKCHIP, crypto (aes/ccm/ctr/arc4), CFG80211,
DRM_ROCKCHIP/ROCKCHIP_VOP all =y; PSCI-style SMC removed via the psci-node deletion.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-24 22:02:55 -06:00
BFE EngineeringandClaude Opus 4.8 79ef2df67a kernel: full-SoC DT transplant — batch-1 peripherals at parity on 6.18
Move from the hand-built minimal DT to the vendor rv1106.dtsi (full SoC:
pinctrl, gpio×5, dmac, cru+grf_cru, all peripherals), with our lean board DTS
(rv1106-warden.dts) enabling only the wall-HMI's needs — no camera/ISP/CSI.

Two deltas made it boot on 6.18: overwrite boot-mode.h with the vendor's (extra
BOOT_* constants) and DELETE the psci node (no secure monitor → SMC fault →
"Attempted to kill the idle task"). Recipe in dts/README.md.

Verified on warden-c8a3 (uname 6.18.46, full WardenOS userspace): pinctrl,
gpio0-4, pl330 DMA, uart1/2/4 (ttyS1/2/4), i2c3, dw-wdt (watchdog0) all probe.
DRIVER-PARITY.md tracks the remaining ports (VOP display, AIC8800 wifi, rknpu,
usb2phy, saradc-compat, RGA) toward full parity with the 5.10 kernel.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-24 21:12:49 -06:00