Commit Graph
2 Commits
Author SHA1 Message Date
BFE EngineeringandClaude Opus 4.8 c7ba8781a4 kernel/rv1106: GMAC ethernet VERIFIED (100M link) + OTP verified
GMAC  eth0 Link Up 100Mbps/Full on c8a3: ported rv1106_ops into mainline
dwmac-rk.c (VOGRF RMII mode/speed + integrated FEPHY powerup via CON0;
mainline set_speed/powerup split; bandgap trim omitted — analog opt the PHY
runs without). &gmac enabled; uses the internal ethernet-phy@2. gmac/PORT-DONE.md.

OTP  now reads real data (px30_otp_read): 5211 02fe 084d 5231 ('MR1' chip id),
no timeout. rng-otp/PORT-DONE.md updated.

Batch A + GMAC complete — TRNG, OTP, GMAC all verified on hardware.
DRIVER-PARITY updated.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-25 00:54:01 -06:00
BFE EngineeringandClaude Opus 4.8 270211029d kernel/rv1106: batch A — TRNG verified + OTP (read fn corrected)
TRNG  VERIFIED on c8a3: rv1106 trngv1 == rk3588 TRNG_V1 IP; one OF-table
entry reusing rk3588_soc_data. /dev/hwrng active, rng_current=rockchip-rng,
real HW entropy (c697503d... non-zero). Hardware entropy for the panel.

OTP 🔨: rockchip-otp0 nvmem device registers; added rv1106_data (6-clock
sbpi layout). First reg_read=rk3588_otp_read timed out ('timeout during read
setup'); corrected to px30_otp_read (user-mode OTPC_USER interface = the
vendor's rk3568_otp_read sequence). Cell reads re-verify next _b boot.

See rng-otp/PORT-DONE.md. dts snapshot refreshed (rng+otp enabled).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-25 00:44:35 -06:00