BFE EngineeringandClaude Opus 4.8
daed33056f
usb2phy: ported the RV1106 inno-usb2 phy config to 6.18 (rv1106_usb2phy_cfg; fields map 1:1 except utmi_iddig->utmi_id and chg_mode->opmode; 5.10-only iddig_output/en/bvalid_grf_sel dropped; phy_tuning left off, guarded so safe). With PHY_ROCKCHIP_INNO_USB2=y + the u2phy/usbdrd/dwc3 DT enabled, verified on warden-c8a3: the DWC3 comes up as xhci-hcd @ 0xffb00000 — USB host works. eth0 gadget just needs dr_mode=peripheral. saradc: added rv1106_saradc_data (2-ch v2, matches the vendor) + the native compatible. Driver now matches; probe still returns -22 (a clk-rate/setup detail, not the data) — TODO. Also captured: the growing board dts (USB nodes), the port fragments under usb/ and adc/. DRIVER-PARITY.md updated: ~14 drivers now at parity on 6.18. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
14 lines
488 B
GLSL
14 lines
488 B
GLSL
/* RV1106: a 2-channel v2 SARADC (ported from the vendor driver). */
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static const struct iio_chan_spec rockchip_rv1106_saradc_iio_channels[] = {
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SARADC_CHANNEL(0, "adc0", 10),
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SARADC_CHANNEL(1, "adc1", 10),
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};
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static const struct rockchip_saradc_data rv1106_saradc_data = {
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.channels = rockchip_rv1106_saradc_iio_channels,
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.num_channels = ARRAY_SIZE(rockchip_rv1106_saradc_iio_channels),
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.clk_rate = 1000000,
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.start = rockchip_saradc_start_v2,
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.read = rockchip_saradc_read_v2,
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};
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