BFE EngineeringandClaude Opus 5
e12bb2c554
Cherry-picked onto the pinned SDK so the ONLY delta versus the pin is this patch -- the xHCI controller-death investigation needs a controlled build. The forward-port omitted the vendor driver's rv1106_usb2phy_tuning with the note "the phy is functional without it". It is functional, but not reliable: with these registers at reset defaults the HS link is electrically marginal under sustained traffic, a bulk transfer eventually stalls, and the r8152 Tx-timeout recovery issues an xHCI Stop Endpoint command the controller never answers. Measured carrier-on to death over four runs: 14s, 519s, 521s, 584s. Refs flare-edge#160 Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01MVGTC78dgCGfRANNKjoPea
81 lines
3.3 KiB
GLSL
81 lines
3.3 KiB
GLSL
* RV1106 USB2 PHY: single OTG port at 0xff3e0000 (ported from the vendor driver;
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* fields map 1:1 to 6.18 except utmi_iddig -> utmi_id, and the 5.10-only
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* iddig_output/iddig_en/bvalid_grf_sel are dropped). Signal-quality phy_tuning
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* was originally left off here; it is now implemented (patches/27-usb-phy-tuning.patch)
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* because "functional without it" turned out not to mean reliable -- see #160.
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*/
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static const struct rockchip_usb2phy_cfg rv1106_phy_cfgs[] = {
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{
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.reg = 0xff3e0000,
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.num_ports = 1,
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.phy_tuning = rv1106_usb2phy_tuning,
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.clkout_ctl = { 0x0058, 4, 4, 1, 0 },
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.port_cfgs = {
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[USB2PHY_PORT_OTG] = {
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.phy_sus = { 0x0050, 8, 0, 0, 0x1d1 },
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.bvalid_det_en = { 0x0100, 2, 2, 0, 1 },
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.bvalid_det_st = { 0x0104, 2, 2, 0, 1 },
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.bvalid_det_clr = { 0x0108, 2, 2, 0, 1 },
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.idfall_det_en = { 0x0100, 5, 5, 0, 1 },
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.idfall_det_st = { 0x0104, 5, 5, 0, 1 },
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.idfall_det_clr = { 0x0108, 5, 5, 0, 1 },
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.idrise_det_en = { 0x0100, 4, 4, 0, 1 },
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.idrise_det_st = { 0x0104, 4, 4, 0, 1 },
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.idrise_det_clr = { 0x0108, 4, 4, 0, 1 },
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.ls_det_en = { 0x0100, 0, 0, 0, 1 },
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.ls_det_st = { 0x0104, 0, 0, 0, 1 },
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.ls_det_clr = { 0x0108, 0, 0, 0, 1 },
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.utmi_avalid = { 0x0060, 10, 10, 0, 1 },
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.utmi_bvalid = { 0x0060, 9, 9, 0, 1 },
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.utmi_id = { 0x0060, 6, 6, 0, 1 },
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.utmi_ls = { 0x0060, 5, 4, 0, 1 },
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},
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},
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.chg_det = {
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.opmode = { 0x0050, 8, 0, 0, 0x1d7 },
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.cp_det = { 0x0060, 13, 13, 0, 1 },
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.dcp_det = { 0x0060, 12, 12, 0, 1 },
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.dp_det = { 0x0060, 14, 14, 0, 1 },
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.idm_sink_en = { 0x0058, 8, 8, 0, 1 },
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.idp_sink_en = { 0x0058, 7, 7, 0, 1 },
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.idp_src_en = { 0x0058, 9, 9, 0, 1 },
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.rdm_pdwn_en = { 0x0058, 10, 10, 0, 1 },
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.vdm_src_en = { 0x0058, 12, 12, 0, 1 },
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.vdp_src_en = { 0x0058, 11, 11, 0, 1 },
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},
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},
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{ /* sentinel */ }
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};
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static const struct of_device_id rockchip_usb2phy_dt_match[] = {
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{ .compatible = "rockchip,rv1106-usb2phy", .data = &rv1106_phy_cfgs },
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{ .compatible = "rockchip,px30-usb2phy", .data = &rk3328_phy_cfgs },
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{ .compatible = "rockchip,rk3036-usb2phy", .data = &rk3036_phy_cfgs },
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{ .compatible = "rockchip,rk3128-usb2phy", .data = &rk3128_phy_cfgs },
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{ .compatible = "rockchip,rk3228-usb2phy", .data = &rk3228_phy_cfgs },
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{ .compatible = "rockchip,rk3308-usb2phy", .data = &rk3308_phy_cfgs },
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{ .compatible = "rockchip,rk3328-usb2phy", .data = &rk3328_phy_cfgs },
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{ .compatible = "rockchip,rk3366-usb2phy", .data = &rk3366_phy_cfgs },
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{ .compatible = "rockchip,rk3399-usb2phy", .data = &rk3399_phy_cfgs },
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{ .compatible = "rockchip,rk3562-usb2phy", .data = &rk3562_phy_cfgs },
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{ .compatible = "rockchip,rk3568-usb2phy", .data = &rk3568_phy_cfgs },
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{ .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
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{ .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
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{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
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{}
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};
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MODULE_DEVICE_TABLE(of, rockchip_usb2phy_dt_match);
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static struct platform_driver rockchip_usb2phy_driver = {
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.probe = rockchip_usb2phy_probe,
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.driver = {
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.name = "rockchip-usb2phy",
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.of_match_table = rockchip_usb2phy_dt_match,
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},
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};
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module_platform_driver(rockchip_usb2phy_driver);
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MODULE_AUTHOR("Frank Wang <frank.wang@rock-chips.com>");
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MODULE_DESCRIPTION("Rockchip USB2.0 PHY driver");
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MODULE_LICENSE("GPL v2");
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