Files
bfe-core1106-sdk/kernel/rv1106-enablement/dts
BFE EngineeringandClaude Opus 4.8 270211029d kernel/rv1106: batch A — TRNG verified + OTP (read fn corrected)
TRNG  VERIFIED on c8a3: rv1106 trngv1 == rk3588 TRNG_V1 IP; one OF-table
entry reusing rk3588_soc_data. /dev/hwrng active, rng_current=rockchip-rng,
real HW entropy (c697503d... non-zero). Hardware entropy for the panel.

OTP 🔨: rockchip-otp0 nvmem device registers; added rv1106_data (6-clock
sbpi layout). First reg_read=rk3588_otp_read timed out ('timeout during read
setup'); corrected to px30_otp_read (user-mode OTPC_USER interface = the
vendor's rk3568_otp_read sequence). Cell reads re-verify next _b boot.

See rng-otp/PORT-DONE.md. dts snapshot refreshed (rng+otp enabled).

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-25 00:44:35 -06:00
..

RV1106 6.18 devicetree

  • rv1106-warden.dts — our board DT. #includes the vendor rv1106.dtsi (the full SoC: pinctrl, gpio×5, dmac, cru+grf_cru, uart, emmc, i2c, saradc, watchdog, usb, vop, npu, rga, …), then enables only what the wall-HMI needs. No camera/ISP/CSI. Grows one driver batch at a time (see ../DRIVER-PARITY.md).
  • rv1106-warden-m2.dts — the earlier standalone minimal DT used to bring up M2/M3 before the full-SoC transplant; kept for reference.

Transplanting the vendor SoC DT onto 6.18 (recipe)

Copy into arch/arm/boot/dts/rockchip/ of the 6.18 tree: rv1106.dtsi, rv1106-pinctrl.dtsi, rockchip-pinconf.dtsi. Copy the vendor-only dt-bindings headers into include/dt-bindings/: soc/rockchip-system-status.h, suspend/rockchip-rv1106.h, display/media-bus-format.h, and overwrite soc/rockchip,boot-mode.h with the vendor's (it has extra BOOT_CHARGING/UMS/PANIC/WATCHDOG constants the DT uses). Then the two hardware deltas:

  1. Delete the psci node from rv1106.dtsi. RV1106 has no secure monitor in our boot chain, so arm,psci-1.0 + method="smc" makes the SMC call fault → Oops - bad modeAttempted to kill the idle task. (Confirmed on c8a3.)
  2. Enable the peripherals in the board DTS (&uart2, &emmc, …).

Verified on warden-c8a3: pinctrl, gpio04, pl330 DMA, uart1/2/4, i2c3, dw-wdt all probe; full WardenOS userspace boots.