BFE EngineeringandClaude Opus 4.8
435953799c
The device counterpart to warden-modbus's master/scanner: request-frame in, response-frame out, in host memory. CRC16 is byte-identical to the master (poly 0xA001, low-first; known vector 01 03 00 00 00 01 -> 84 0A verified). Implements the data plane — read/write holding & input registers, coils, discrete inputs (FC 0x01-0x06, 0x0F, 0x10) + Report Slave ID (0x11) — with exception replies (illegal function/address/value) and the two real-world faults the master must survive: a device that silently ignores a request (drop_next) and one that NAKs everything (force_exception). This is what the modbus-master MC/DC harness drives against; MEI (0x2B/0x0E) is a follow-up. 11 tests, sim crate 25/25 green. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
23 lines
964 B
Rust
23 lines
964 B
Rust
//! warden-sim — host-side hardware simulator for WardenOS.
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//!
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//! Lets driver and supervisor logic run and be tested on the host, with no panel,
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//! by modelling the RV1106 hardware the vendor SDK cannot: the register/SRAM bus
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//! ([`membus`]), the RISC-V HPMCU watchdog coprocessor ([`hpmcu`]), the CRU reset
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//! ladder ([`cru`]), and the RS-485 device end ([`modbus`]) — and, as they land,
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//! the RGA blitter and the NPU.
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//!
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//! Design: one [`membus::MemBus`] seam, two backends. On the host, [`membus::SimBus`]
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//! is an in-memory word map; on the device, flared's `devmem.rs` implements the same
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//! trait over `/dev/mem`, so the same code runs against either. See the repo README.
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//! (The [`modbus`] slave rides a byte-stream seam, not the register bus.)
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pub mod cru;
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pub mod hpmcu;
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pub mod membus;
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pub mod modbus;
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pub use cru::{BootMode, CruSim, ResetCause};
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pub use hpmcu::HpmcuSim;
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pub use membus::{MemBus, SimBus};
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pub use modbus::ModbusSlave;
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