Phase 3 of the device sim, all verified on QEMU 10.0.11: - qemu/rs485-bridge/: std-only crate bridging a QEMU serial chardev (unix socket) to warden_sim::ModbusSlave — gap-based RTU framing (CRC failures degrade to real-slave silence), line-protocol control socket for register seeding and fault injection (drop/exception/clear), bounds-checked so a scenario typo answers err instead of panicking the bus. 7 unit tests, bench in the sim_bench pattern. Verified end-to-end: guest master frame on /dev/ttyS4 (pci-serial) answered from the sim slave, CRC-correct. - virt machine gains highmem=off: the 32-bit non-LPAE kernel cannot reach virt's default 40-bit PCIe ECAM (pci-host-generic EOVERFLOW); with it the full PCI set probes (16550A ttyS0, i6300esb). - Watchdog scenario verified: guest arms /dev/watchdog, no petting, i6300esb resets the VM ~30s later (first environment where this arm is testable). - qemu/tests/portal-scenario.sh: the real static-musl warden-flared inside the VM against flare-edge's mock portal on the host — authenticated check-in, firmware desired-state pull, and download of a real signed tier-1 .wfw offer, asserted from the portal log. Found and filed flare-edge#106 (fatal SIGBUS in the HPMCU boot-loaded probe on non-RV1106 memory maps); runs against a flared built from the qemu-vm-support fix branch. - stage-2 init: WARDEN_FLARE_INSECURE=1 + WARDEN_HPMCU=0 (documented VM deviations), firmware-version stamp, newline-terminated state seeds. - CI: rs485-bridge joins the test loop and bench job; new qemu-tools job (shellcheck + initramfs + disk image on hosted runners); kernel-build gains a fail-closed qemu boot-smoke step. All qemu scripts shellcheck-clean. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_018HUayid7W5w7jBdb9Rrj1K
45 lines
1.4 KiB
Rust
45 lines
1.4 KiB
Rust
//! Micro-benchmarks for the RS-485 bridge dispatch path — same dependency-free
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//! fixed-iteration pattern as sim/benches/sim_bench.rs: human timings to
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//! stdout, one JSON line per benchmark to stderr for CI trend capture.
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//!
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//! Run: `cargo bench` (or `cargo run --release --bench bridge_bench`).
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use std::time::Instant;
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use warden_rs485_bridge::{handle_control_line, Bus};
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use warden_sim::modbus::read_holding;
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fn bench<F: FnMut()>(name: &str, iters: u64, mut f: F) {
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for _ in 0..(iters / 10).max(1) {
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f(); // warm up
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}
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let t = Instant::now();
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for _ in 0..iters {
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f();
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}
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let ns = t.elapsed().as_nanos() as f64 / iters as f64;
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println!("{name:<24} {ns:>9.1} ns/op ({iters} iters)");
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eprintln!("{{\"bench\":\"{name}\",\"ns_per_op\":{ns:.1},\"iters\":{iters}}}");
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}
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fn main() {
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const N: u64 = 1_000_000;
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// Full request->reply dispatch through the locked slave (the per-poll cost
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// a guest master pays on the simulated bus, minus socket I/O).
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{
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let bus = Bus::new(1, 128, 64);
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let req = read_holding(1, 2, 4);
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bench("bridge_dispatch", N, || {
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let _ = bus.slave.lock().unwrap().handle_frame(&req);
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});
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}
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// Control-channel command parse + register write.
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{
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let bus = Bus::new(1, 128, 64);
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bench("control_line", N, || {
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let _ = handle_control_line("holding 5=1234", &bus);
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});
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}
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}
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