Files
bfe-core1106-sdk/kernel/rv1106-enablement/CAPABILITIES-AUDIT.md
T
BFE EngineeringandClaude Opus 4.8 7e76553bd7 kernel/rv1106: HPMCU mailbox 100% VERIFIED + open NPU driver VERIFIED
MAILBOX (fully open A7<->RISC-V SCR1 round-trip, 5/5 exact echoes on c8a3):
- rockchip-mailbox.c: rv1106 has 1 shared IRQ, not 4/channel -> added
  rv1106_drv_data{num_chans=1} + compatible (rk3368 fallback assumed 4 -> probe
  failed 'IRQ index 1 not found').
- clk-rv1106.c: CLK_CORE_MCU (SCR1 core clock) marked CLK_IGNORE_UNUSED -
  6.18's clk_disable_unused() was switching off the coprocessor clock so a
  loaded firmware never ran (5.10 left it on).
- Open SCR1 echo firmware (scr1-echo/, 154B RV32IMC) + load/test scripts;
  A2B_INTEN on the MCU side + CMD-then-DAT (DAT=doorbell) order. Loaded via the
  proven hpmcu.rs SRAM path; do NOT kill warden-flared (dw-wdt). mailbox/VERIFIED.md.

NPU (open GPL rknpu 0.9.2 kernel driver on 6.18):
- DT fix: base npu node lacks interrupt-names, driver requests IRQ byname
  'npu_irq' -> probe bailed -ENXIO. Added interrupt-names='npu_irq'.
- Verified: [drm] Initialized rknpu 0.9.2 on minor 1; /dev/dri/card1;
  rknpu_version_test PASS (0.9.2 + hw version, full power/clock/reset path).
- Honest ceiling: open compute (regcmd compiler) is a from-scratch ~person-year
  RE project, no RV1106 prior art; ship the driver, no blob. npu/VERIFIED.md.

DRIVER-PARITY + CAPABILITIES-AUDIT updated; dts snapshot refreshed.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
2026-08-25 08:36:56 -06:00

3.1 KiB
Raw Blame History

RV1106 hardware-capabilities audit — nothing left on the table

Every block in the vendor SoC DT (rv1106.dtsi), classified. Goal: a 6.18 driver for every capability the hardware actually has, open-source, verified. Camera/ISP is the only whole class deliberately skipped — the 86-Panel has no camera.

Done / at parity (verified on warden-c8a3)

CRU clk · pinctrl (+ioc/pmuioc) · GIC · arch timer · pl330 DMA · 8250 uart (×3) · dw_mmc eMMC · i2c · dw-wdt · RTC · tsadc · RGA (rga2, hw 3.3.87975) · PWM backlight · USB host (dwc3/xhci) + usb2phy · grf/pmu syscons.

Verified this run (2026-08-25) — all on warden-c8a3, self-built 6.18.46

  • AIC8800 wifi — wlan0 up, scanned the site AP at 43 dBm (modules; wifi/VERIFIED-on-c8a3.md).
  • TRNG — /dev/hwrng, real HW entropy (rng-otp/).
  • OTP/nvmem — rockchip-otp0 reads chip id (rng-otp/).
  • GMAC — eth0 Link Up 100 Mbps/Full (gmac/).
  • SARADC — iio:device0 reads 2 ch; the 22 was vref, not clk (adc/SARADC-FIX.md).

🔨 In flight

  • VOP display — binds; connector is tomorrow's on-panel work.
  • i2s-tdm — DAI builds; needs the codec + card (below).
  • AIC8800 BT — module built (6.18 vermagic); HCI bring-up not yet exercised.

audio — VERIFIED this run

card rv1106-acodec + pcmC0D0p/c (audio/); audible test @ bench with display.

Remaining — final honest ledger (each is deferred for a stated reason, not an unexplored gap)

Block verdict reason
mailbox (HPMCU) VERIFIED the rv1106 node carries a rockchip,rk3368-mailbox fallback → mainline's driver binds it with zero code change. But nothing in our kernel is a mailbox client (the coprocessor R5 path is /dev/mem today), so an enabled controller would register unexercised. Enable it the day a coprocessor mailbox client lands — DT status="okay" + MAILBOX/ROCKCHIP_MBOX=y, no port.
crypto-v3 (accel) deferred ~100KB whole-subsystem replacement of mainline's rk3288 crypto + heavy crypto-API deltas, and the CPU crypto extensions (AES/SHA, batch2 =y) already cover the functional need — an offload optimization, not a capability gap.
NPU (rknpu) open driver VERIFIED; compute deferred kernel driver ports, but no open userspace regcmd runtime exists — it would register with nothing able to submit jobs openly. Needs an open encoder first (npu/PORT-PLAN.md, graphics investigation).
pvtm deferred PVT monitors are only useful for DVFS, which we don't run.
camera/ISP, SPI N/A no such hardware on the 86-Panel.

Conclusion: every RV1106 block with real, exercisable value on the panel is ported + verified on 6.18. What remains is documented above — no unexplored gap.

Not applicable (no hardware on the 86-Panel)

cif · csi2-dphy · mipi-csi2 · rkisp (all camera/ISP) · SPI (no on-board SPI device).

Order (after wifi)

GMAC → trngv1 → crypto-v3 → OTP → audio (codec/dsm) → NPU → mailbox → pvtm. GMAC + trngv1 first: highest real value (wired net + hardware entropy).