BFE EngineeringandClaude Opus 4.8
85b0db7eee
- npu.rs: /proc/rknpu/load model (present-at-load% vs absent) mirroring sysmon's parse; 100% coverage. - rga.rs: recording improcess() fake — logs dispatched blits + programmable IM_STATUS to drive the CPU-fallback path; the blit pixels aren't modelled, the dispatch logic is; 100% coverage. - lib.rs re-exports NpuSim / RgaSim / Blit / Surface / Rect / ImStatus. 37 sim tests green; RISC-V (hpmcu) + RGA + NPU all simulated per future-features-2 §SDK. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf