BFE EngineeringandClaude Opus 4.8
7e76553bd7
MAILBOX (fully open A7<->RISC-V SCR1 round-trip, 5/5 exact echoes on c8a3):
- rockchip-mailbox.c: rv1106 has 1 shared IRQ, not 4/channel -> added
rv1106_drv_data{num_chans=1} + compatible (rk3368 fallback assumed 4 -> probe
failed 'IRQ index 1 not found').
- clk-rv1106.c: CLK_CORE_MCU (SCR1 core clock) marked CLK_IGNORE_UNUSED -
6.18's clk_disable_unused() was switching off the coprocessor clock so a
loaded firmware never ran (5.10 left it on).
- Open SCR1 echo firmware (scr1-echo/, 154B RV32IMC) + load/test scripts;
A2B_INTEN on the MCU side + CMD-then-DAT (DAT=doorbell) order. Loaded via the
proven hpmcu.rs SRAM path; do NOT kill warden-flared (dw-wdt). mailbox/VERIFIED.md.
NPU (open GPL rknpu 0.9.2 kernel driver on 6.18):
- DT fix: base npu node lacks interrupt-names, driver requests IRQ byname
'npu_irq' -> probe bailed -ENXIO. Added interrupt-names='npu_irq'.
- Verified: [drm] Initialized rknpu 0.9.2 on minor 1; /dev/dri/card1;
rknpu_version_test PASS (0.9.2 + hw version, full power/clock/reset path).
- Honest ceiling: open compute (regcmd compiler) is a from-scratch ~person-year
RE project, no RV1106 prior art; ship the driver, no blob. npu/VERIFIED.md.
DRIVER-PARITY + CAPABILITIES-AUDIT updated; dts snapshot refreshed.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
RV1106 6.18 devicetree
rv1106-warden.dts— our board DT.#includes the vendorrv1106.dtsi(the full SoC: pinctrl, gpio×5, dmac, cru+grf_cru, uart, emmc, i2c, saradc, watchdog, usb, vop, npu, rga, …), then enables only what the wall-HMI needs. No camera/ISP/CSI. Grows one driver batch at a time (see../DRIVER-PARITY.md).rv1106-warden-m2.dts— the earlier standalone minimal DT used to bring up M2/M3 before the full-SoC transplant; kept for reference.
Transplanting the vendor SoC DT onto 6.18 (recipe)
Copy into arch/arm/boot/dts/rockchip/ of the 6.18 tree:
rv1106.dtsi, rv1106-pinctrl.dtsi, rockchip-pinconf.dtsi. Copy the
vendor-only dt-bindings headers into include/dt-bindings/:
soc/rockchip-system-status.h, suspend/rockchip-rv1106.h,
display/media-bus-format.h, and overwrite soc/rockchip,boot-mode.h
with the vendor's (it has extra BOOT_CHARGING/UMS/PANIC/WATCHDOG constants the
DT uses). Then the two hardware deltas:
- Delete the
pscinode fromrv1106.dtsi. RV1106 has no secure monitor in our boot chain, soarm,psci-1.0+method="smc"makes the SMC call fault →Oops - bad mode→Attempted to kill the idle task. (Confirmed on c8a3.) - Enable the peripherals in the board DTS (
&uart2,&emmc, …).
Verified on warden-c8a3: pinctrl, gpio0–4, pl330 DMA, uart1/2/4, i2c3, dw-wdt all probe; full WardenOS userspace boots.