BFE Engineering
42fb386f60
Replace every em dash with real punctuation (rewrites, not hyphen swaps) in docs, code comments, scripts, configs, and the port records; convert en dashes, curly quotes, ellipsis glyphs, arrows, and section signs to ASCII; drop machine-writing tell phrases from living docs. ADR titles now use a colon. The M2 bring-up DTS model string carried an em dash into the patch series and its record echoes; fixed at both, and the full series re-verified to apply cleanly onto pristine 6.18.46. One comment in freshness.h deliberately names the em dash glyph the UI renders as the unknown mark; that is data, kept as prose naming it. Verified: cargo tests (sim, config-lint, rs485-bridge), shellcheck, both driver MC/DC harnesses, patches-apply.
47 lines
1.9 KiB
Bash
Executable File
47 lines
1.9 KiB
Bash
Executable File
#!/bin/sh
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# Load the SCR1 mailbox-echo firmware into hpmcu_sram (0xFF6FE000) and start the
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# core, replicating flared/hpmcu.rs load_and_release() EXACTLY (the proven
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# sequence): GRF uncached peripheral window -> CORECRU hold -> firmware to SRAM
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# -> clear SRAM mailbox -> SGRF boot addr -> CORECRU release. SRAM path only
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# (NOT the 0x40000 boot-load brick hazard).
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#
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# Do NOT kill warden-flared: it does a ONE-SHOT firmware load at boot then just
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# beats the SRAM heartbeat + pets the kernel dw-wdt. Killing it stops the dw-wdt
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# petting and the board resets ~15s later. We simply reset the SCR1 and reload;
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# flared won't re-load over us (one-shot), and its heartbeat writes are to a
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# different SRAM word than our echo firmware uses. (clk_core_mcu is kept alive by
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# CLK_IGNORE_UNUSED in clk-rv1106.c, so the released core actually runs.)
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FW=${1:-/userdata/echo-fw-words.txt}
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# GRF uncached peripheral window (covers CRU + this SRAM + the mailbox
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# 0xff5c0000): WITHOUT this the MCU's peripheral/SRAM accesses are cached and
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# invisible to Linux. hpmcu.rs: GRF_BASE 0xff040000 +0x24/+0x28 = 0xff000/0xffc00.
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devmem 0xff040024 32 0xff000
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devmem 0xff040028 32 0xffc00
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# hold CORECRU MCU core in reset while we (re)write firmware
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devmem 0xff3b8a04 32 0x001e001e
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# write firmware words to 0xFF6FE000 (devmem uses mmap -> SRAM writable)
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i=0
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while read w; do
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a=$(printf '0x%x' $((0xff6fe000 + i * 4)))
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devmem "$a" 32 "$w"
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i=$((i + 1))
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done < "$FW"
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# clear the SRAM mailbox/debug area (0xFF6FFF00, 8 words) so stale state can't
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# be mistaken for a live echo
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j=0
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while [ $j -lt 8 ]; do
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devmem "$(printf '0x%x' $((0xff6fff00 + j * 4)))" 32 0
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j=$((j + 1))
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done
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# set HPMCU boot addr, then release from reset
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devmem 0xff076044 32 0xff6fe000
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devmem 0xff3b8a04 32 0x001e0000
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sleep 1
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echo "loaded $i words; SCR1 released."
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echo " DBG_STATE = $(devmem 0xff6fff08 32) (expect 0x584F424D = 'MBOX')"
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