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kernel: M2 DONE — self-built 6.18 boots on real RV1106 hardware (warden-c8a3)

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The Linux 6.18.46 forward-port boots on the panel through our ported drivers,
verified on the serial console: earlycon, arch timer (BogoMIPS calibrated), our
clk-rv1106 CRU, pinctrl, and the mainline 8250 bound to uart2 clocked by our CRU
(ttyS2 16550A), then rootfs mount.

Two DT fixes got it past "Starting kernel":
- fdt placed high (load=0x08000000) so the bloated multi_v7 zImage (~20 MiB
  decompressed) stops overrunning the DTB at 0xc00000 (was: r2=0, "invalid dtb").
- added the rockchip,rv1106-grf-cru node (grf-clock-controller child of grf) so
  clk-rv1106's grf_ctx isn't NULL (was: panic in rockchip_clk_register_branches).
Console pinned to 115200 (readable on the CP2102 bench adapter; prod uses 1.5M).

The boot-image format and the A/B _b-slot safe-test method (which auto-reverted to
_a on every failed attempt) are in docs/m2-boot-on-c8a3.md. M3 next: lean defconfig
+ dw_mmc DT + our Buildroot userspace rebuilt on 6.18.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
This commit is contained in:
BFE Engineering
2026-08-24 19:31:37 -06:00
co-authored by Claude Opus 4.8
parent b21229c8aa
commit f3087399f2
3 changed files with 133 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files
kernel/rv1106-enablement/dts/rv1106-warden-m2.dts
+13 -4
View File
@@ -36,13 +36,14 @@
};
chosen {
stdout-path = "serial2:1500000n8";
stdout-path = "serial2:115200n8";
/*
* earlycon with no baud = reuse the divisor the bootloader left in
* uart2, so the first prints work regardless of our clock tree. The
* ttyS console rate (1.5M) is PORT-VERIFY against the board.
* uart2, so the first prints work regardless of our clock tree. The ttyS console is
* pinned to 115200 to stay readable on the CP2102 bench adapter;
* production WardenOS uses 1.5M.
*/
bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyS2,1500000n8 earlyprintk rootwait";
bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyS2,115200n8 earlyprintk rootwait";
};
memory@0 {
@@ -91,6 +92,14 @@
grf: syscon@ff000000 {
compatible = "rockchip,rv1106-grf", "syscon", "simple-mfd";
reg = <0xff000000 0x68000>;
/* The CRU's clk-rv1106 registers a second branch set against this
* GRF clock-controller (grf_ctx); without the node grf_ctx is NULL
* and of_clk_init NULL-derefs in rockchip_clk_register_branches. */
grf_cru: grf-clock-controller {
compatible = "rockchip,rv1106-grf-cru";
#clock-cells = <1>;
};
};
cru: clock-controller@ff3a0000 {