BFE EngineeringandClaude Opus 4.8
f2a9c0a32c
- patches/: the pristine-6.18.46 -> WardenOS delta as a 13-patch, subsystem-split series (223 files, ~136K lines: clk, pinctrl, DTs/mach, usb-phy, VOP/panel/rgb, mailbox, pvtm, rknpu, rga, aic8800 wifi, audio codec, thermal/rtc/adc/gmac/touch). Verified: every patch applies cleanly onto pristine (git apply --check), the full series reproduces the hardware-verified tree, and the applied source configures + builds the warden dtb + rockchip DRM drivers (rc=0). - build/build-kernel.sh: fetch+verify pristine (sha256-pinned) -> apply series -> warden_defconfig -> zImage + rv1106-warden.dtb. build/warden_defconfig captured. - CI: `patches-apply` (GitHub-hosted, cached tarball) enforces the series applies; `kernel-build` (self-hosted warden-sdk runner, dispatch-gated until registered) runs the full build and uploads the image. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
108 lines
4.3 KiB
Diff
108 lines
4.3 KiB
Diff
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
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index ef1c4b929..1b286f081 100644
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--- a/drivers/gpu/drm/panel/panel-simple.c
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+++ b/drivers/gpu/drm/panel/panel-simple.c
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@@ -476,6 +476,26 @@ static struct panel_desc *panel_dpi_probe(struct device *dev)
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drm_bus_flags_from_videomode(&vm, &bus_flags);
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desc->bus_flags = bus_flags;
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+ /*
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+ * Optional bus-format (a MEDIA_BUS_FMT_* code, e.g. RGB666_1X18) so the
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+ * RGB/parallel output can be configured for the panel's real data width.
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+ * Upstream panel-dpi doesn't read this, but a parallel RGB panel with no
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+ * bus_format leaves the encoder guessing and the screen black. Match the
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+ * vendor bindings, which carry bus-format on the panel node. Derive bpc
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+ * from the width so panel-simple's {6,8} check is satisfied.
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+ */
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+ if (!of_property_read_u32(np, "bus-format", &desc->bus_format)) {
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+ switch (desc->bus_format) {
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+ case MEDIA_BUS_FMT_RGB666_1X18:
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+ case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
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+ desc->bpc = 6;
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+ break;
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+ default:
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+ desc->bpc = 8;
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+ break;
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+ }
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+ }
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+
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/* We do not know the connector for the DT node, so guess it */
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desc->connector_type = DRM_MODE_CONNECTOR_DPI;
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diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
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index ba6b0528d..f678ad891 100644
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--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
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+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
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@@ -1406,7 +1406,19 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
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switch (s->output_type) {
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case DRM_MODE_CONNECTOR_LVDS:
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- VOP_REG_SET(vop, output, rgb_dclk_pol, 1);
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+ /*
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+ * WardenOS 86-Panel (RV1106 internal parallel RGB): the panel
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+ * latches pixel data on the NON-inverted dclk edge. Mainline
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+ * hardcodes rgb_dclk_pol=1 here (inverted), which makes the
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+ * panel sample RGB on the wrong clock edge -> fully healthy
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+ * pipeline (connector connected, VOP streaming, backlight on)
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+ * but a physically BLACK screen. Verified by reading the working
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+ * vendor-5.10 _a slot's VOP register PX30_DSP_CTRL0 (0xff990020)
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+ * on real hardware: rgb_dclk_pol (bit1) = 0. The vendor 5.10 VOP
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+ * driver derives this as (bus_flags & PIXDATA_DRIVE_NEGEDGE)?1:0,
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+ * which resolves to 0 for this panel. Match that.
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+ */
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+ VOP_REG_SET(vop, output, rgb_dclk_pol, 0);
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VOP_REG_SET(vop, output, rgb_pin_pol, pin_pol);
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VOP_REG_SET(vop, output, rgb_en, 1);
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break;
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diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
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index d1f788763..e0d09595f 100644
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--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
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+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
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@@ -1232,6 +1232,37 @@ static const struct vop_data rv1126_vop = {
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.lut_size = 1024,
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};
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+/*
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+ * RV1106 VOP: the same RV-series "lite" VOP as rv1126 (VOP_VERSION 2.0xc vs
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+ * 2.0xb), so it reuses rv1126's register sub-structs. Only the version and the
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+ * smaller max raster differ. Ported for the WardenOS 86-Panel (720x720 RGB).
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+ */
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+/*
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+ * RV1106 uses WIN1 as its (only) primary scanout plane -- see px30_win1_data.
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+ * The vendor rv1106_vop_win_data is { NULL-win0, win1-primary }; mirror that
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+ * as a single primary win1 here (mainline registers one plane per non-NULL
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+ * entry). Reusing rv1126's { win0-overlay, win2-primary } set left the panel
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+ * black because WIN2 does not drive this SoC's RGB output.
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+ */
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+static const struct vop_win_data rv1106_vop_win_data[] = {
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+ { .base = 0x00, .phy = &px30_win1_data,
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+ .type = DRM_PLANE_TYPE_PRIMARY },
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+};
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+
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+static const struct vop_data rv1106_vop = {
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+ .version = VOP_VERSION(2, 0xc),
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+ .feature = VOP_FEATURE_INTERNAL_RGB, /* RV1106 drives a parallel-RGB panel */
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+ .intr = &px30_intr,
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+ .common = &rv1126_common,
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+ .modeset = &rv1126_modeset,
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+ .output = &rv1126_output,
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+ .misc = &rv1126_misc,
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+ .win = rv1106_vop_win_data,
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+ .win_size = ARRAY_SIZE(rv1106_vop_win_data),
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+ .max_output = { 1280, 1280 },
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+ .lut_size = 1024,
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+};
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+
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static const struct of_device_id vop_driver_dt_match[] = {
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{ .compatible = "rockchip,rk3036-vop",
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.data = &rk3036_vop },
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@@ -1261,6 +1292,8 @@ static const struct of_device_id vop_driver_dt_match[] = {
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.data = &rk3328_vop },
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{ .compatible = "rockchip,rv1126-vop",
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.data = &rv1126_vop },
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+ { .compatible = "rockchip,rv1106-vop",
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+ .data = &rv1106_vop },
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{},
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};
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MODULE_DEVICE_TABLE(of, vop_driver_dt_match);
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