BFE Engineering
42fb386f60
Replace every em dash with real punctuation (rewrites, not hyphen swaps) in docs, code comments, scripts, configs, and the port records; convert en dashes, curly quotes, ellipsis glyphs, arrows, and section signs to ASCII; drop machine-writing tell phrases from living docs. ADR titles now use a colon. The M2 bring-up DTS model string carried an em dash into the patch series and its record echoes; fixed at both, and the full series re-verified to apply cleanly onto pristine 6.18.46. One comment in freshness.h deliberately names the em dash glyph the UI renders as the unknown mark; that is data, kept as prose naming it. Verified: cargo tests (sim, config-lint, rs485-bridge), shellcheck, both driver MC/DC harnesses, patches-apply.
88 lines
5.1 KiB
Markdown
88 lines
5.1 KiB
Markdown
# Display (VOP + RGB panel): VERIFIED on warden-c8a3 (2026-08-25)
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The 86-Panel renders the **full WardenOS Dashboard UI** on our self-built Linux
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6.18.46 (`_b` slot), pixel-identical to the stock 5.10 `_a` slot. Verified by
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webcam pointed at the physical panel (pixels can't be checked over serial/ssh);
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`warden-ui -b DRM` drawing the Dashboard: nav sidebar, "Wellhead 03" site card,
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Mesh/WAN/LAN/RS485 status rows, correct colors, no banding, no colour swap.
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This closes the "Open" item in `README.md` (connector-not-created + the deeper
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black-screen chain that followed it).
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## The bring-up chain (each step was a real blocker)
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1. **Connector never created** (`Cannot find any crtc`): `CONFIG_ROCKCHIP_RGB`
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was not set, AND the vendor `&rgb` bridge node's dangling endpoint
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(`rgb_in_vop -> vop_out_rgb`) read to fw_devlink as a vop<->panel dependency
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cycle, so the VOP probed before the panel. Fix: enable `ROCKCHIP_RGB` +
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`/delete-node/ &rgb;` so `vop_out_rgb <-> panel_in_vop` is the only graph link
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(rockchip_rgb_init then defers + retries and finds the panel -> `LVDS-1`).
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2. **Backlight dark**: `&pwm1` had `pinctrl-names = "active"`; mainline
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pwm-rockchip relies on the driver core auto-applying the **`"default"`** state,
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so the PWM pin was never muxed. Fix: rename to `"default"`.
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3. **bus-format unset** (RGB output width undefined): mainline `panel-dpi`
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ignores the DT `bus-format`. Fix: small `panel_dpi_probe()` patch to read it +
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`bus-format = <MEDIA_BUS_FMT_RGB666_1X18>` on the panel node.
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4. **RGB output pins unmuxed** (no data reaches the panel): the 22-pin parallel
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bus (`lcd_clk` + `lcd_d0..d17` + den/hsync/vsync) needs the `&lcd_pins` mux.
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The vendor carried it as `pinctrl-0 = <&lcd_pins>` **on the `&rgb` node**, which
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we deleted in step 1. Fix: re-attach it on `&vop` (`pinctrl-names="default"`;
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the core auto-applies it at VOP probe).
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5. **`reset-gpios` on the panel node is WRONG** (leave it off): GPIO0_A1 resets the
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CH32V003 panel-init MCU, released once early by U-Boot `board_init()`. Handing
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it to `panel-simple` makes `drm_panel_prepare()` re-reset the MCU mid-scanout.
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Luckfox deleted these props upstream (commit e2b0ffa22); the flare-edge 5.10 DTS
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documents the deletion as "the fix." We match: **backlight only, no reset-gpios**.
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## The two root causes of the final "backlit-black" (VOP driver bugs)
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With connector + backlight + pins + panel-init all correct, the screen was still
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physically black (backlight on, `LVDS-1` connected, VOP streaming, fb0 720x720,
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`modetest`/splash written): the classic "everything healthy, glass dark" state.
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Found by dumping the VOP register block `0xff990000` on the **working `_a` slot**
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and diffing against `_b` (same SoC, same register map):
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**Bug 1: DCLK polarity inverted.** `rockchip_drm_vop.c` hardcodes
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`rgb_dclk_pol = 1` for the LVDS/RGB output. The panel latches pixel data on the
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**non-inverted** edge: `_a` reads `PX30_DSP_CTRL0` (0xff990020) = `0x1`
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(rgb_dclk_pol bit1 = **0**). The vendor 5.10 derives it as
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`(bus_flags & PIXDATA_DRIVE_NEGEDGE) ? 1 : 0`, which is 0 for this panel. With the
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inverted clock the panel samples RGB on the wrong edge -> black. **Fix:** set
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`rgb_dclk_pol` to 0 in the `DRM_MODE_CONNECTOR_LVDS` case.
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**Bug 2: wrong primary scanout window.** The rv1106 VOP scans out through
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**WIN1**, but our port reused rv1126's win table (`win0`-overlay + **`win2`**-primary).
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The vendor `rv1106_vop_win_data` is `{ NULL-win0, rk3366_lit_win1_data-primary }`,
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i.e. WIN1 (`PX30_WIN1_*` at 0x090). Mainline was configuring WIN2, which never
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reaches this SoC's RGB interface, so WIN1 stayed all-zero and nothing scanned out.
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Register evidence (`_a` working vs `_b` broken, before the fix):
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| reg | name | `_a` (works) | `_b` (black) |
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|---|---|---|---|
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| 0x090 | WIN1_CTRL0 (enable) | `0x00000001` | `0x00000000` |
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| 0x098 | WIN1_VIR (stride) | `0x000002D0` (720) | `0x00000000` |
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| 0x0a0 | WIN1_MST (fb addr) | `0x0F900000` | `0x00000000` |
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| 0x0a4 | WIN1_DSP_INFO (size)| `0x02CF02CF` (720x720) | `0x00EF013F` (stale) |
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**Fix:** `rv1106_vop_win_data[] = { { .phy = &px30_win1_data, PRIMARY } }`
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(`px30_win1_data` already exists in mainline over `PX30_WIN1_*`, just wasn't wired
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for rv1106). After the fix `_b` reads WIN1_CTRL0=1, WIN1_DSP_INFO=0x02CF02CF:
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matching `_a`.
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## Files changed (in research/linux-6.18.46)
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- `drivers/gpu/drm/rockchip/rockchip_drm_vop.c`: `rgb_dclk_pol` 1 -> 0 (LVDS case).
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- `drivers/gpu/drm/rockchip/rockchip_vop_reg.c`: `rv1106_vop_win_data` uses
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`px30_win1_data` as the single PRIMARY window (was rv1126's win0+win2).
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- `drivers/gpu/drm/panel/panel-simple.c`: `panel_dpi_probe()` reads DT `bus-format`.
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- `arch/arm/boot/dts/rockchip/rv1106-warden.dts`: `&vop` pinctrl `<&lcd_pins>`;
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`&pwm1` pinctrl "default"; `/delete-node/ &rgb`; panel `bus-format` RGB666,
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no reset-gpios.
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## Known separate issue (NOT display)
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`_b` still cold-reboots periodically (pre-existing `_b` general-stability issue,
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independent of the display: the panel renders correctly the whole time it is up).
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Tracked separately; the high-bootlimit env (`bootlimit=10000`) keeps these reboots
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from tripping `altbootcmd=download` into the loader during bring-up.
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