BFE EngineeringandClaude Opus 4.8
5abf1c4468
The RV1106 VOP is the RV-series "lite" VOP (rockchip,rv1106-vop, VOP_VERSION 2.0xc),
mainline's VOP1 driver. Its sibling rv1126 is already in 6.18, so rv1106_vop reuses
rv1126's register sub-structs + VOP_FEATURE_INTERNAL_RGB + the smaller raster.
Verified on warden-c8a3: with the driver delta + DT (vop enabled with named
"ahb"/"dclk" resets, vop_out repointed to a panel-dpi 720x720 node, pwm-backlight
on pwm1), the VOP BINDS and DRM initialises (/dev/dri/card0), and the PWM backlight
comes up. The register data / version / feature / resets are validated.
Open: /sys/class/drm/card0 has no connector yet — rockchip_rgb_init isn't producing
one ("Cannot find any crtc"). Last mile of M4; needs a debug print in rgb_init + the
panel bus_format, and the pixels must be verified on the physical panel (can't be
checked over serial/ssh). Full recipe + next steps in display/README.md.
Also batch-2 config: GPIO_SYSFS, PWM_ROCKCHIP, crypto (aes/ccm/ctr/arc4), CFG80211,
DRM_ROCKCHIP/ROCKCHIP_VOP all =y; PSCI-style SMC removed via the psci-node deletion.
Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
131 lines
2.6 KiB
Devicetree
131 lines
2.6 KiB
Devicetree
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* WardenOS 86-Panel board DT for the self-built Linux 6.18 forward-port.
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*
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* Includes the full vendor rv1106.dtsi (SoC nodes + pinctrl + gpio + dmac), then
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* enables only what our wall-HMI needs — no camera/ISP/CSI. Grows one driver
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* batch at a time toward full parity with the 5.10 kernel (DRIVER-PARITY.md).
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*/
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/dts-v1/;
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#include "rv1106.dtsi"
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/ {
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model = "WardenOS 86-Panel (RV1106)";
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compatible = "rockchip,rv1106-warden", "rockchip,rv1106";
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chosen {
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stdout-path = "serial2:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyS2,115200n8 earlyprintk rootwait";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x00000000 0x10000000>; /* 256 MiB */
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};
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};
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/* --- console --- */
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&uart2 {
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status = "okay";
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};
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/* --- eMMC rootfs (M3) --- */
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&emmc {
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bus-width = <8>;
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cap-mmc-highspeed;
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mmc-hs200-1_8v;
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non-removable;
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status = "okay";
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};
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/* --- batch 1: mainline peripherals (wire DT + config) --- */
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&uart1 {
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status = "okay";
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};
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&uart4 {
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status = "okay";
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};
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&i2c3 {
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status = "okay";
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};
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&saradc {
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status = "okay";
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};
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&wdt {
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status = "okay";
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};
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/* --- M4: display (VOP + RGB → 720x720 panel + PWM backlight) --- */
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&display_subsystem {
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status = "okay";
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};
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&vop {
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status = "okay";
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/* mainline rockchip_drm_vop requests named "ahb" + "dclk" resets that the
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* vendor node omits; without them vop_bind fails "failed to get ahb reset". */
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resets = <&cru SRST_H_VOP>, <&cru SRST_D_VOP>;
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reset-names = "ahb", "dclk";
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};
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/* mainline wires vop_out straight to the panel (no separate rgb node) */
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&vop_out_rgb {
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remote-endpoint = <&panel_in_vop>;
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};
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&pwm1 {
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status = "okay";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1m2_pins>;
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};
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/ {
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backlight: backlight {
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 100000 50000>;
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brightness-levels = <0 32 64 96 128 160 192 224 255>;
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default-brightness-level = <8>;
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status = "okay";
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};
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panel: panel {
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compatible = "panel-dpi";
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backlight = <&backlight>;
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width-mm = <85>;
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height-mm = <85>;
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panel-timing {
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clock-frequency = <30000000>;
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hactive = <720>;
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vactive = <720>;
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hback-porch = <44>;
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hfront-porch = <46>;
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vback-porch = <18>;
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vfront-porch = <16>;
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hsync-len = <2>;
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vsync-len = <2>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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port {
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panel_in_vop: endpoint {
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remote-endpoint = <&vop_out_rgb>;
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};
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};
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};
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};
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/* the vendor rgb bridge node has no 6.18 driver and its dangling endpoint
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* corrupts the vop->panel of_graph; disable it so the graph is clean. */
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&rgb {
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status = "disabled";
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};
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