BFE Engineering
42fb386f60
Replace every em dash with real punctuation (rewrites, not hyphen swaps) in docs, code comments, scripts, configs, and the port records; convert en dashes, curly quotes, ellipsis glyphs, arrows, and section signs to ASCII; drop machine-writing tell phrases from living docs. ADR titles now use a colon. The M2 bring-up DTS model string carried an em dash into the patch series and its record echoes; fixed at both, and the full series re-verified to apply cleanly onto pristine 6.18.46. One comment in freshness.h deliberately names the em dash glyph the UI renders as the unknown mark; that is data, kept as prose naming it. Verified: cargo tests (sim, config-lint, rs485-bridge), shellcheck, both driver MC/DC harnesses, patches-apply.
55 lines
2.2 KiB
Markdown
55 lines
2.2 KiB
Markdown
# arch-timer / vDSO clock fix: plan (issue #3)
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Status: DIAGNOSED off-board, fix gated on two bench measurements.
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## Established (2026-08-30, qemu/ device sim)
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The same kernel family under `qemu-system-arm -M virt` gives musl
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`CLOCK_MONOTONIC`/`_RAW` rate ratio 0.99963 vs `/proc/uptime` (interval
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measurement, `qemu/tests/clockprobe`). The generic 6.18 armv7 vDSO is
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therefore CORRECT; the board symptom (musl reads ~12% high, kernel time
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right) is RV1106-specific. The boot chain runs in the secure world and is
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closed rkbin: the NS view of the CPU timer registers (CNTFRQ, CNTVOFF) is
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whatever it left behind, and only the arch-counter path (vDSO,
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`arch_sys_counter`) trusts them.
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## What the bench must answer (single boot of the `_b` slot)
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Run `clockprobe` (interval mode) on the 6.18 slot:
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1. `ratio_mono` far from 1.0 -> RATE error: CNTFRQ wrong. The true rate =
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claimed rate (dmesg `arch_timer: cp15 timer running at X MHz`) times the
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measured ratio.
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2. `ratio_mono` ~= 1.0 but `abs_ratio` far from 1.0 -> OFFSET error: CNTVOFF
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left nonzero; rate fine.
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(The original issue measured only one absolute sample, which cannot
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distinguish these.)
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## The fix (both cases, one DT override)
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Append to the BOARD dts (`rv1106-warden.dts`, never the vendor dtsi) an
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override on the armv7-timer node:
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arm,cpu-registers-not-fw-configured;
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clock-frequency = <MEASURED_HZ>;
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The property makes the driver use the physical counter, ignore CNTVOFF, and
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take the frequency from DT: the documented remedy for firmware that does
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not configure the CPU timer registers. `MEASURED_HZ` comes from bench
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answer 1 (do NOT guess; a wrong value makes every clock wrong instead of
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one path). Ship as an update to the arch/dts patch in `patches/`.
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## Regression guards
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- Off-board: `qemu/tests/clock-sanity.sh` asserts the vDSO rate in the VM
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(guards the generic path; cannot see board registers).
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- On-board: re-run `clockprobe` on the patched `_b` slot; both ratios and
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the absolute ratio must be ~1.0. Record the numbers here and in issue #3.
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## Bench access note
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2026-08-30: c8a3 is physically dark (CP2102 console silent through two
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remote power cycles; both network paths down), needs hands at the bench
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before the measurements can run.
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