Files

T

BFE EngineeringandClaude Opus 4.8 5abf1c4468 kernel: M4 VOP display driver ported to 6.18 — binds on hardware (connector WIP)

The RV1106 VOP is the RV-series "lite" VOP (rockchip,rv1106-vop, VOP_VERSION 2.0xc),
mainline's VOP1 driver. Its sibling rv1126 is already in 6.18, so rv1106_vop reuses
rv1126's register sub-structs + VOP_FEATURE_INTERNAL_RGB + the smaller raster.

Verified on warden-c8a3: with the driver delta + DT (vop enabled with named
"ahb"/"dclk" resets, vop_out repointed to a panel-dpi 720x720 node, pwm-backlight
on pwm1), the VOP BINDS and DRM initialises (/dev/dri/card0), and the PWM backlight
comes up. The register data / version / feature / resets are validated.

Open: /sys/class/drm/card0 has no connector yet — rockchip_rgb_init isn't producing
one ("Cannot find any crtc"). Last mile of M4; needs a debug print in rgb_init + the
panel bus_format, and the pixels must be verified on the physical panel (can't be
checked over serial/ssh). Full recipe + next steps in display/README.md.

Also batch-2 config: GPIO_SYSFS, PWM_ROCKCHIP, crypto (aes/ccm/ctr/arc4), CFG80211,
DRM_ROCKCHIP/ROCKCHIP_VOP all =y; PSCI-style SMC removed via the psci-node deletion.

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf

2026-08-24 22:02:55 -06:00

2.4 KiB

Raw Blame History

M4 — display (VOP) port to 6.18

The RV1106 VOP is the older RV-series "lite" VOP (rockchip,rv1106-vop, VOP_VERSION 2.0xc), driven by mainline's rockchip_drm_vop.c (VOP1), not VOP2. Its sibling rv1126 is already in mainline 6.18, so the register data is a small reuse — like the clk/pinctrl ports.

The driver delta (`rockchip_vop_reg.c`)

rv1106_vop_data.c.frag — add this vop_data (reuses rv1126's common/modeset/ output/misc/intr/win sub-structs; only the version, the smaller 1280² raster, and the VOP_FEATURE_INTERNAL_RGB feature differ), plus the match entry:

{ .compatible = "rockchip,rv1106-vop", .data = &rv1106_vop },

VOP_FEATURE_INTERNAL_RGB is essential — it is what makes vop_bind call rockchip_rgb_init() for the parallel-RGB output (rv1126 routes through MIPI and omits it).

The DT (in `../dts/rv1106-warden.dts`)

&vop enabled + named resets resets = <&cru SRST_H_VOP>, <&cru SRST_D_VOP>; reset-names = "ahb", "dclk"; — the mainline driver requires these (the vendor node omits them; without them: vop_bind: failed to get ahb reset).
&vop_out_rgb repointed straight to the panel (mainline has no separate rgb node — rockchip_rgb_init is a helper the VOP calls).
panel (panel-dpi, 720×720, 30 MHz) + pwm-backlight on &pwm1.

Verified on warden-c8a3 (2026-08-24)

CONFIG_DRM_ROCKCHIP=y + CONFIG_ROCKCHIP_VOP=y. On hardware:

rockchip-drm display-subsystem: bound ff990000.vop
[drm] Initialized rockchip 1.0.0 for display-subsystem on minor 0

/dev/dri/card0 is present and the PWM backlight is up (/sys/class/backlight, brightness settable). The VOP driver port is validated — the register data, version, feature, and resets are right.

Open (needs on-panel eyes + a little more debug)

/sys/class/drm/card0-* has no connector yet — rockchip_rgb_init isn't producing one (log: Cannot find any crtc or sizes), despite INTERNAL_RGB set and a clean vop→panel of_graph. Likely a panel-probe-order / drm_of_find_panel_or_bridge detail. This is the last mile of M4 and, unlike the driver bind, needs the panel physically observed (pixels can't be verified over serial/ssh). To pin it down: a debug print in rockchip_rgb_init (child_count / find-panel ret), and set the panel bus_format to MEDIA_BUS_FMT_RGB666_1X18 (a small panel_dpi_probe addition, since mainline panel-dpi doesn't read bus-format from DT).

2.4 KiB Raw Blame History Unescape Escape