BFE EngineeringandClaude Fable 5
1d7dec167e
The qemu/ device sim answered the first question off-board: the same kernel family under -M virt gives musl vDSO rate ratio 0.99963 — the generic 6.18 armv7 vDSO is correct, so the board symptom is RV1106 register state (CNTFRQ/CNTVOFF, firmware-owned, secure-world boot chain). - qemu/tests/clockprobe: interval-based musl probe separating RATE error (CNTFRQ) from boot OFFSET (CNTVOFF) — the original single absolute sample cannot distinguish them. - qemu/tests/clock-sanity.sh: VM regression guard asserting the vDSO rate within 1% (PASSES: 1.00026); cross-builds the probe and stages it as payload itself. - kernel/rv1106-enablement/timer/PLAN.md: the DT fix (arm,cpu-registers-not-fw-configured + measured clock-frequency on the board dts) gated on the two bench measurements; c8a3 is currently physically dark, needs hands at the bench. - clockprobe joins the CI test loop. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_018HUayid7W5w7jBdb9Rrj1K
13 lines
363 B
TOML
13 lines
363 B
TOML
[package]
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name = "clockprobe"
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version = "0.1.0"
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edition = "2021"
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description = "Interval-based monotonic-clock rate probe: compares musl/vDSO CLOCK_MONOTONIC(+_RAW) against /proc/uptime so rate errors and boot-time offsets (CNTVOFF) separate cleanly. Diagnostic for issue #3."
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license = "GPL-2.0-only"
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[dependencies]
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libc = "0.2"
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[profile.release]
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strip = true
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