BFE EngineeringandClaude Opus 4.8
d50934d048
M1 is complete (clk + pinctrl + mach compile clean); this reaches M2's build milestone. multi_v7_defconfig + configs/m2-earlycon.fragment builds an 11.8 MB zImage with clk-rv1106.o and pinctrl-rockchip.o (our rv1106 data) compiled into the full tree — no rv1106 warnings. dts/rv1106-warden-m2.dts (CPU, GIC-400, arch timer, 256 MiB RAM, GRF, the CRU, uart2 as snps,dw-apb-uart) compiles clean at W=1 with earlycon=uart8250,mmio32,0xff4c0000. Reproducible via build-m2.sh. Boot is the next step and is on-hardware/attended: package zImage + dtb, load on a bench unit with a recovery net, watch for the earlycon "it's alive". PORT-VERIFY before trusting a boot: DDR size/base, the CPU clock mux, console baud. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_017wB8KB3MMQztRDXCMCkPrf
26 lines
999 B
Plaintext
26 lines
999 B
Plaintext
# M2 earlycon config fragment for the RV1106 → Linux 6.18 forward-port.
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#
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# Base: multi_v7_defconfig (PORT-STATUS confirms it configures and CLK_RV1106
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# wires in cleanly). Apply this fragment on top, then `make olddefconfig`:
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#
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# make ARCH=arm CROSS_COMPILE=arm-rockchip830-linux-uclibcgnueabihf- multi_v7_defconfig
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# ./scripts/kconfig/merge_config.sh -m .config kernel/.../configs/m2-earlycon.fragment
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# make ARCH=arm CROSS_COMPILE=... olddefconfig zImage
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#
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# This builds an 11.8 MB zImage with our ported SoC drivers compiled in
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# (clk-rv1106.o, pinctrl-rockchip.o with the rv1106 data) — verified 2026-08-24.
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# --- our ported RV1106 SoC drivers ---
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_CLK_RV1106=y
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CONFIG_PINCTRL_ROCKCHIP=y
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# --- console: mainline 8250_dw drives uart2 (snps,dw-apb-uart) ---
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CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_CONSOLE=y
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CONFIG_SERIAL_8250_DW=y
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CONFIG_SERIAL_OF_PLATFORM=y
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# --- earlycon: the "it's alive" print, before clk/pinctrl probe ---
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CONFIG_SERIAL_EARLYCON=y
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